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| TC554161AFT-70,-85,-10,-70L,-85L,-10L TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 262,144-WORD BY 16-BIT STATIC RAM DESCRIPTION The TC554161AFT is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by 16bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 5V 10% power supply. Advanced circuit technology provides both high speed and low power at an operating current of 10 mA/MHz (typ) and a minimum cycle time of 70 ns. It is automatically placed in low-power mode at 2 mA standby current (typ) when chip enable ( CE ) is asserted high. There are two control inputs. CE is used to select the device and for data retention control, and output enable ( OE ) provides fast memory access. Data byte control pin ( LB , UB ) provides lower and upper byte access. This device is well suited to various microprocessor system applications where high speed, low power and battery backup are required. The TC554161AFT is available in a plastic 54-pin thin-small-outline package (TSOP). FEATURES * * * * * * Low-power dissipation Operating: 55 mW/MHz (typical) Single power supply voltage of 5 V 10% Power down features using CE . Data retention supply voltage of 2 to 5.5 V Direct TTL compatibility for all inputs and outputs Standby Current (maximum): TC554161AFT -70,-85,-10 5.5 V 3.0 V 100 mA 50 mA -70L,-85L,-10L 50 mA 25 mA * Access Times (maximum): TC554161AFT -70,-70L Access Time CE Access Time OE Access Time -85,-85L 85 ns 85 ns 45 ns -10,-10L 100 ns 100 ns 50 ns 70 ns 70 ns 35 ns * Package: TSOP II54-P-400-0.80 (AFT) (Weight: 0.57 g typ) PIN ASSIGNMENT (TOP VIEW) NC A3 A2 A1 A0 I/O16 I/O15 VDD GND I/O14 I/O13 UB CE OP R/W I/O12 I/O11 GND VDD I/O10 I/O9 NC A17 A16 A15 A14 A13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 A4 A5 A6 A7 NC I/O1 I/O2 VDD GND I/O3 I/O4 LB OE OP NC I/O5 I/O6 GND VDD I/O7 I/O8 A8 A9 A10 A11 A12 NC PIN NAMES A0~A17 I/O1~I/O16 CE Address Inputs Data Inputs/Outputs Chip Enable Read/Write Control Output Enable Data Byte Control Power (+5 V) Ground No Connection Option R/W OE LB , UB VDD GND NC OP* *: OP pin must be open of connected to GND. (Normal pinout) 2001-08-17 1/10 TC554161AFT-70,-85,-10,-70L,-85L,-10L BLOCK DIAGRAM CE A0 A1 A2 A3 A11 A12 A13 A14 A15 A16 A17 ROW ADDRESS BUFFER ROW ADDRESS REGISTER ROW ADDRESS DECODER MEMORY CELL ARRAY 2,048 128 16 (4,194,304) VDD GND I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 I/O16 SENSE AMP DATA OUTPUT BUFFER DATA INPUT BUFFER COLUMN ADDRESS DECODER COLUMN ADDERSS REGISTER COLUMN ADDRESS BUFFER CE A4 A5 A6 A7 A8 A9 A10 CLOCK GENERATOR R/W OE UB LB CE CE MAXIMUM RATINGS SYMBOL VDD VIN VI/O PD Tsolder Tstg Topr Power Supply Voltage Input Voltage Input/Output Voltage Power Dissipation Soldering Temperature (10s) Storage Temperature Operating Temperature RATING VALUE -0.3~7.0 -0.3*~7.0 -0.5~VDD + 0.5 DATA OUTPUT BUFFER DATA INPUT BUFFER UNIT V V V W C C C 0.6 260 -55~150 0~70 *: -3.0 V when measured at a pulse width of 30ns 2001-08-17 2/10 TC554161AFT-70,-85,-10,-70L,-85L,-10L DC RECOMMENDED OPERATING CONDITIONS (Ta = 0 to 70C) SYMBOL VDD VIH VIL VDH *: PARAMETER Power Supply Voltage Input High Voltage Input Low Voltage Data Retention Supply Voltage MIN 4.5 2.2 -0.3* TYP 5.0 3/4 3/4 3/4 MAX 5.5 VDD + 0.3 0.8 5.5 UNIT V V V V 2.0 -3.0 V when measured at a pulse width of 30 ns DC CHARACTERISTICS (Ta = 0 to 70C, VDD = 5 V 10%) SYMBOL IIL ILO IOH IOL PARAMETER Input Leakage Current Output Leakage Current Output High Current Output Low Current VIN = 0 V~VDD CE = VIH or R/W = VIL or OE = VIH, VOUT = 0 V~VDD TEST CONDITION MIN 3/4 3/4 -1.0 TYP 3/4 3/4 3/4 3/4 3/4 3/4 MAX 1.0 1.0 3/4 3/4 UNIT mA mA VOH = 2.4 V VOL = 0.4 V CE = VIL and R/W = VIH, IOUT = 0 mA, Other Input = VIH/VIL mA mA 2.1 tcycle = 70 ns tcycle = 85 ns, 100 ns tcycle = 1 ms 3/4 3/4 3/4 3/4 3/4 3/4 3/4 110 100 3/4 IDDO1 Operating Current IDDO2 mA 15 3/4 3/4 tcycle = 70 ns CE = 0.2 V and R/W = VDD - 0.2 V, IOUT = 0 mA, tcycle = 85 ns, 100 ns Other Input = VDD - 0.2 V/0.2 V tcycle = 1 ms CE = VIH 100 90 3/4 mA 10 3/4 IDDS1 3 3/4 mA -70,-85,-10 Standby Current IDDS2 CE = VDD - 0.2 V, VDD = 2.0 V~5.5 V Ta = 25C Ta = 0~70C Ta = 25C Ta = 0~70C 3/4 3/4 3/4 3/4 2 3/4 100 5 50 mA 2 3/4 -70L,-85L,-10L CAPACITANCE (Ta = 25C, f = 1 MHz) SYMBOL CIN COUT Note: PARAMETER Input Capacitance Output Capacitance VIN = GND VOUT = GND TEST CONDITION MAX 10 10 UNIT pF pF This parameter is periodically sampled and is not 100% tested. 2001-08-17 3/10 TC554161AFT-70,-85,-10,-70L,-85L,-10L OPERATING MODE MODE CE OE R/W LB UB I/O1~I/O8 Output High-Z Output Input High-Z Input High-Z I/O9~I/O16 Output Output High-Z Input Input High-Z High-Z High-Z POWER IDDO IDDO IDDO IDDO IDDO IDDO IDDO IDDS L Read L L H H L L Write L * L L H L L H * L H L L Output Deselect L Standby * = don't care H = logic high L = logic low H * * H * * * H * H * H High-Z 2001-08-17 4/10 TC554161AFT-70,-85,-10,-70L,-85L,-10L AC CHARACTERISTICS AND OPERATING CONDITIONS (Ta = 0 to 70C, VDD = 5 V 10%) READ CYCLE TC554161AFT SYMBOL PARAMETER -70,-70L MIN tRC tACC tCO tOE tBA tOH tCOE tOEE tBE tOD tODO tBD Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Data Byte Control Access Time Output Data Hold Time Chip Enable Low to Output Active Output Enable Low to Output Active Data Byte Control Low to Output Active Chip Enable High to Output High-Z Output Enable High to Output High-Z Data Byte Control High to Output High-Z 70 3/4 3/4 3/4 3/4 -85,-85L MIN 85 3/4 3/4 3/4 3/4 -10,-10L MIN 100 3/4 3/4 3/4 3/4 UNIT MAX 3/4 MAX 3/4 MAX 3/4 70 70 35 35 3/4 3/4 3/4 3/4 85 85 45 45 3/4 3/4 3/4 3/4 100 100 50 50 3/4 3/4 3/4 3/4 10 10 5 5 3/4 3/4 3/4 10 10 5 5 3/4 3/4 3/4 10 10 5 5 3/4 3/4 3/4 ns 25 25 25 30 30 30 35 35 35 WRITE CYCLE TC554161AFT SYMBOL PARAMETER -70,-70L MIN tWC tWP tCW tBW tAS tWR tDS tDH tOEW tODW Write Cycle Time Write Pulse Width Chip Enable to End of Write Data Byte Control to End of Write Address Setup Time Write Recovery Time Data Setup Time Data Hold Time R/W High to Output Active R/W Low to Output High-Z 70 50 60 50 0 0 30 0 5 3/4 -85,-85L MIN 85 55 70 55 0 0 35 0 5 3/4 -10,-10L MIN 100 60 80 60 0 0 40 0 5 3/4 UNIT MAX 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 MAX 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 MAX 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 ns 25 30 35 AC TEST CONDITIONS PARAMETER Output load Input pulse level Timing measurements Reference level t R, t F TEST CONDITION 100 pF + 1 TTL Gate 0.6 V, 2.4 V 1.5 V 1.5 V 5 ns 2001-08-17 5/10 TC554161AFT-70,-85,-10,-70L,-85L,-10L TIMING DIAGRANS READ CYCLE (See Note 1) tRC Address tACC tCO CE tOH tOE OE tOD tBA UB , LB tODO tBE tOEE DOUT Hi-Z tCOE INDETERMINATE tBD VALID DATA OUT Hi-Z WRITE CYCLE 1 (R/W CONTROLLED) (See Note 4) tWC Address tAS R/W tCW CE tWP tWR tBW UB , LB tODW DOUT (See Note 2) Hi-Z tDS DIN (See Note 5) tOEW (See Note 3) tDH (See Note 5) VALID DATA IN 2001-08-17 6/10 TC554161AFT-70,-85,-10,-70L,-85L,-10L WRITE CYCLE 2 ( CE CONTROLLED) (See Note 4) tWC Address tAS R/W tCW CE tWP tWR tBW UB , LB tBE DOUT Hi-Z tCOE tODW Hi-Z tDS tDH (See Note 5) DIN (See Note 5) VALID DATA IN LB WRITE CYCLE 3 ( UB , CONTROLLED) (See Note 4) tWC Address tAS R/W tCW CE tWP tWR tBW UB , LB tCOE DOUT Hi-Z tBE tODW Hi-Z tDS tDH (See Note 5) DIN (See Note 5) VALID DATA IN 2001-08-17 7/10 TC554161AFT-70,-85,-10,-70L,-85L,-10L Note: (1) (2) (3) (4) (5) R/W remains HIGH for the read cycle. If CE goes LOW coincident with or after R/W goes LOW, the outputs will remain at high impedance. If CE goes HIGH coincident with or before R/W goes HIGH, the outputs will remain at high impedance. If OE is HIGH during the write cycle, the outputs will remain at high impedance. Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be applied. DATA RETENTION CHARACTERISTICS (Ta = 0 to 70C) SYMBOL VDH PARAMETER Data Retention Supply Voltage -70,-85,-10 IDDS2 Standby Current -70L,-85L,-10L tCDR tR *: MIN 2.0 VDH = 3.0 V VDH = 5.5 V VDH = 3.0 V VDH = 5.5 V 3/4 3/4 3/4 3/4 TYP 3/4 3/4 3/4 3/4 3/4 3/4 3/4 MAX 5.5 50 100 25* 50 3/4 3/4 UNIT V mA Chip Deselect to Data Retention Mode Time Recovery Time 0 5 ns ms 5 mA (max) at Ta = 0 to 40C CE CONTROLLED DATA RETENTION MODE VDD DATA RETENTION MODE 4.5 V (See Note) VIH tCDR CE (See Note) tR VDD - 0.2 V GND Note: When CE is operating at the VIH level (2.2V), the standby current is given by IDDS1 during the transition of VDD from 4.5 to 2.4V. 2001-08-17 8/10 TC554161AFT-70,-85,-10,-70L,-85L,-10L PACKAGE DIMENSIONS Weight: 0.57 g (typ) 2001-08-17 9/10 TC554161AFT-70,-85,-10,-70L,-85L,-10L RESTRICTIONS ON PRODUCT USE 000707EBA * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. 2001-08-17 10/10 |
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